1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor device and more particularly, to an improvement of an electrode lead of a transistor in a bipolar type semiconductor integrated circuit.
2. Description of the Prior Art
A transistor in a bipolar type semiconductor integrated circuit is generally formed in an electrically independent island by an junction isolation, oxide film isolation using a selective oxidation technique, isolation using triple diffusion and the like. A method for forming an npn transistor by oxide film isolation is described herein. However, the method can be adapted to the case where the above described various kinds of isolation other than oxide film isolation are used.
FIGS. 1A to 1E are cross sectional views showing main process steps of a conventional method of manufacturing a semiconductor device. Referring now to the drawings, the manufacturing method is simply described.
In FIG. 1A, an n type (n.sup.+ type) layer 2 having a high impurity concentration to be a collector buried layer is selectively formed in a p type (p.sup.- type) silicon substrate 1 having a low impurity concentration and then, an n.sup.- type epitaxial layer 3 is formed thereon.
In FIG. 1B, selective oxidation is applied utilizing as a mask a nitride film 201 formed on the surface of a pad oxide film 101, so that a thick isolation oxide film 102 is formed in a predetermined region on the surface of the n.sup.- type epitaxial layer 3. At the same time, a p type layer 4, a channel stopper, is formed under the isolation oxide film 102.
In FIG. 1C, both the nitride film 201 utilized as a mask for selective oxidation and the pad oxide film 101 are removed to form a protecting oxide film 103 for protecting against ion implantation and then, the p.sup.+ type layer 5 to be an external base layer is formed utilizing a photoresist film (not shown in this step) as a mask. In addition, the not-shown photoresist film is removed to form a new photoresist film 301 and then, a p type layer 6 to be an active base layer is formed by ion implantation utilizing the photoresist film 301 as a mask.
In FIG. 1D, the photoresist film 301 is removed, a passivation film 401 comprising a phosphosilicate glass (PSG) is deposited and then, heat treatment for both annealing the ion implanted base layers 5 and 6 and thermal shrinking of the PSG film 401 is performed, so that an external base layer 51 and an active base layer 61 in the intermediate step are formed. A contact hole 70 for an emitter electrode and a contact hole 80 for a collector electrode are formed on the PSG film 401 and then, an n.sup.+ type layer 7 to be an emitter layer and an n+ type layer 8 to be a layer for leading out a collector electrode are formed by ion implantation.
In FIG. 1E, an external base layer 52 and an active base layer 62 are completed by annealing each ion implanted layer, and an emitter layer 71 and a layer 81 for leading out a collector electrode are formed and then, a contact hole 50 for a base electrode is formed. Thereafter, a metal silicide [such as platinum silicide (Pt-Si), palladium silicide (Pd-Si) etc.] film 501 for preventing an electrode from penetrating through is formed in each contact hole 50, 70 and 80 and then, a base electrode interconnection 9, an emitter electrode interconnection 10 and a collector electrode interconnection 11 are formed of a metal having low resistance such as aluminum (Al).
FIGS. 2A, 2B and 2C are plan views showing a pattern of a transistor manufactured by the conventional manufacturing method. FIG. 2A shows a single base structure, corresponding to FIG. 1E, FIG. 2B shows a multi-emitter structure, and FIG. 2C shows a plan view showing a pattern of a transistor having a double base structure.
The frequency characteristic of a transistor depends on base-collector capacitance, base resistance and the like. In order to improve the frequency characteristic, these factors must be reduced. Therefore, in order to reduce base resistance, the p.sup.+ type external base layer 52 was provided in the above described structure, which increases base-to-collector capacitance. In addition, base resistance also depends on a distance D.sub.1 between the emitter layer 71 and the contact hole for a base electrode 50 as shown in FIG. 2A. Conventionally, the distance was a total distance of a spacing between the base electrode interconnection 9 and the emitter electrode interconnection 10 and a length of a portion where each electrode interconnection 9, 10 is not overlapped with each contact hole 50, 70. Even if the accuracy of photoetching is improved so that a spacing between base electrode interconnections is reduced, some non-overlapped portion is still left. Furthermore, it is well known that in order to reduce base resistance and improve current driving capacity, a multi-emitter structure as shown in FIG. 2B may be used. The emitter length L.sub.2 shown in FIG. 2B may be slightly smaller as compared with the emitter length L.sub.1, since only the edge portion of an emitter opposed to a base electrode functions in high current and high frequency operation.
In order to reduce base resistance, a double base structure as shown in FIG. 2C may also be used. In this structure, the emitter length L.sub.2 may be small similarly to the multi-emitter structure. However, the multi-emitter structure requires a base electrode between each emitter, and the double base structure must have a base region formed on both sides of an emitter region. Therefore, both the structures have a disadvantage that the base area and the base electrode interconnection region are increased.
As the prior art related to the present invention, an article by T. Hirao, who is an inventor of the present invention, et al., entitled "A 2.1-GHz 56mW Two-Modulus Prescaler IC Using Salicide Base Contact Technology", Extended Abstracts of the 17th Conference on Solid State Devices and Materials, Tokyo, 1985, pp. 381-384 is known. The prior art discloses that base resistance and base capacitance in a base contact of a bipolar transistor are reduced by SCOT (Salicide Bas Contact Technology) process.